Method of forming low dielectric silicon oxynitride spacer films highly selective to etchants

ABSTRACT

A method of depositing a silicon oxynitride spacer film on a gate stack in a semiconductor device involves contacting the gate stack with bistertiarybutylaminosilane (BTBAS), at least one nitrogen containing compound and oxygen (O 2 ). The deposition is controlled to provide a wet etch rate for the deposited spacer film that is within the range of about 25 Angstroms per minute to less than or equal to about 1 Angstrom.

FIELD OF THE INVENTION

[0001] The invention relates to a novel method of depositing a spacerfilm on a gate stack array in a semiconductor device. The invention alsorelates to a new spacer film for use in integrated circuits, and inparticular, to spacer films with excellent resistivity to dry etchantsand enhanced selectivity to wet etchants.

BACKGROUND OF THE INVENTION

[0002] Referring to FIG. 1, there is shown a portion of an integratedcircuit wafer 10 in an intermediate stage of DRAM fabrication. Theintegrated circuit wafer section 10 has a substrate 12 formed of amaterial such as silicon. Formed in and on the substrate 12 are fieldoxide regions 14 and transistor gate stacks 16. The gate stacks 16 havea spacer film 17 deposited thereon. Also shown in FIG. 1 are the activeor doped regions 18 in the substrate 12. A first layer of insulatingmaterial 20, which is usually a type of glass oxide well known in theart, which for example, may comprise Boro-Phospho-Silicate Glass (BPSG)is also formed over the substrate and gate stacks 16. The first layer ofinsulating material 20 may, in actuality, be formed as one or morelayers of insulating material of, for example, BPSG. Also shown in FIG.1 is a second layer of insulating material 22 deposited over the firstlayer 22. Contact openings 24 are then formed through the insulativelayers 20, 22 down to the doped regions 18. Openings 24 are formed usinga patterned photoresist mask (not shown) which defines locations orareas to be etched, i.e. the openings. To form the contact opening, anetchant is applied to the insulating layers 20, 22. Dry etchingtechniques known in the art for performing a self-aligned contact (SAC)etching, are typically utilized for this purpose. Freon-containinggases, for example, are applied to the surface of the insulating layer22 to form the opening 24. A non-exhaustive listing of such gasesincludes such as fluorinated hydrocarbons as CH₂F₂, CHF₃, C₂F₆, C₂HF₅,and CH₃F. The spacer film 17 protects the sides of the gate stacks 16during the SAC dry etching process. After etching, the photoresist layeris removed. The dry etching step often leaves behind a layer of etchresidue 26 in the contact opening 24, usually at the bottom and sidesthereof This etch residue is often comprised of a material such as ahydrocarbon polymer or residual silicon dioxide. The etch residue caninterfere with the connection between the doped region 18 and asubsequently deposited conductive polyplug (not shown) in the contactopening 24.

[0003] To remove the etch residue 26 formed in the contact opening 24, acleaning step is performed. This cleaning step is typically a wet etchprocess in which dilute acid material, preferably dilutefluorine-containing compounds such as dilute hydrofluoric acid (HF) orHF:TMAH (trimethylaluminum hydroxide), for example, are utilized toremove the etch residue 26. Desirably, the etch residue should beremoved without eroding the spacer film 17 or the contact opening 24.The spacer film 17 protects the gate stack 16 from contact with aconductive polyplug, which is deposited within opening 24 and which isusually formed of a material such as doped polysilicon.

[0004] Silicon oxynitrides are desirable as the spacer film 17 sincethey typically form a lower stress film and have a lower dielectricconstant than oxygen-free silicon nitride. Silicon oxynitrides have alsodemonstrated better barrier properties to dopant diffusion than puresilicon oxides. One of the drawbacks of using silicon oxynitride,however, is the wet etch rate of the material in dilute hydrofluoric(HF) acid and other fluorine-containing compounds which may be used inthe aforementioned contact residue cleaning step. With silicon dioxide,the wet etch rate is very often too high causing erosion of the spacerfilm 17 by the etchant material as the etch residue, or polymer/residualsilicon dioxide layer, is removed by the etchant. In certain instances,the etch rate of the spacer film can be as great as two times (2X) theetch rate for the polymer residue layer. It is desirable to have aspacer film that is resistant to etching so that the contact opening 24,and in particular the bottom surface thereof, can be cleaned with amaterial such as dilute HF or HF:TMAH etch while not eroding the spacerfilm 17. It is also desirable to have a spacer film that can bepartially etched, if need be, to provide a more robust conductive plugcontact with the substrate 12.

[0005] What is therefore needed in the art is a new method of forming amore robust and selective spacer film. What is also needed is a newspacer film which exhibits excellent resistivity to the dry etchantsused to form contact openings, and which also exhibits lower etch ratesin wet etchants than other spacer films currently available in the art.

SUMMARY OF THE INVENTION

[0006] The invention provides a method of depositing a siliconoxynitride spacer film on a gate stack in a semiconductor device. Themethod involves depositing an oxynitride layer on the gate stack bycontacting the gate stack with bistertiarybutylaminosilane (BTBAS), atleast one nitrogen-containing compound and oxygen (O₂) to form thesilicon oxynitride spacer film. The stoicheometry and other parametersare controlled to provide a selective wet etch rate for the depositedspacer film that is within the range of about 25 Angstroms per minute toless than or equal to about 1 Angstrom/minute. In a preferred embodimentof the invention, there is silicon carbide incorporation in the spacerfilm for improved dry etch (SAC) resistance.

[0007] The invention further provides a silicon oxynitride spacer filmuseful for protecting a gate stack in a semiconductor device. The spacerfilm has a wet etch rate within the range of about 25 Angstroms/minuteto less than or equal to about 1 Angstrom/minute. The spacer filmfurthermore exhibits a high refractive index and a low dielectricconstant.

[0008] Also provided as part of the invention is a semiconductor devicewith at least one gate stack, and a spacer film deposited over the gatestack. The spacer film has a wet etch rate in fluorine-containing wetetchants within the range of about 25 Angstroms/minute to less than orequal to about 1 Angstrom/minute.

[0009] In still another aspect of the invention, there is provided anintegrated circuit having a substrate with at least one gate stackformed thereon. A spacer film deposited on at least the sides of thegate stack has a wet etch rate in fluorine-containing wet etchantcompounds within the range of about 25 Angstroms/minute to less than orequal to about 1 Angstrom/minute.

[0010] Also provided is a memory device having a memory cell containingan access transistor. The transistor includes a gate stack and a spacerfilm deposited on at least the sides of the gate stack. The spacer filmhas a wet etch rate in fluorine-containing wet etchant compounds withinthe range of about 25 Angstroms/minute to less than or equal to about 1Angstrom/minute.

[0011] Additional advantages and features of the present invention willbecome more readily apparent from the following detailed description anddrawings which illustrate various embodiments of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012]FIG. 1 is a cross sectional view of a prior art semiconductordevice at an immediate stage of fabrication.

[0013]FIG. 2 is a cross sectional view of another semiconductor deviceat an intermediate stage of fabrication and illustrating the process ofthe invention.

[0014]FIG. 3 is a cross sectional view of the semiconductor device ofFIG. 2 at a later stage of fabrication.

[0015]FIG. 4 is a cross sectional view of the semiconductor device ofFIG. 3 at a later stage of fabrication.

[0016]FIGS. 4A and 4B are dose up views of the semiconductor device ofFIG. 4 according to two embodiments of the invention.

[0017]FIG. 5 is a graph of the depth profile of a spacer film which hasbeen deposited according to the process of the invention.

[0018]FIG. 6 is a graph comparing spacer film etch rates for variousflow rate deposition ratios.

[0019]FIG. 7 is a block diagram of a typical processor based systemwhich includes integrated circuits that utilize the spacer film of thepresent invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] The invention in one aspect is directed to a novel method offorming a silicon oxynitride spacer film on gate stacks in asemiconductor wafer device. The spacer film formed from the processhereinafter described adequately protects a gate stack during a SAC etchand also exhibits enhanced selectivity to wet etching used for cleaninga SAC contact opening. As that term is used herein, “enhancedselectivity to wet etching” means that the spacer film exhibits an etchrate within the range of about 25 Angstroms/minute to less than or equalto about 1 Angstrom/minute in many typical “Wet” etchants available inthe semiconductor industry, e.g. fluorine-based wet etchants such as HFand HF-TMAH, which are used to clean contact vias or openings of residuesuch as silicon dioxide and other debris such as polymer residue. At thesame time, the spacer film maintains excellent resistivity to the manytypes of dry etchants, e.g. freon-containing compounds (fluorinatedhydrocarbons), used in self-aligned contact (SAC) etching to form thecontact openings.

[0021] Reference herein shall also be made to the terms “wafer” and“substrate”, which are to be understood as including a silicon base,silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) structures,doped and undoped semiconductors, epitaxial layers of silicon supportedby a base semiconductor foundation, and other semiconductor structures.In addition, when reference is made to a “wafer” or “substrate” in thefollowing description, previous process steps may have been utilized toform arrays, regions or junctions in or on the base semiconductorstructure or foundation. In addition, the semiconductor need not besilicon-based, but could be based on silicon-germanium germanium orgallium arsenide.

[0022] According to the process of the invention, deposition of thesilicon oxynitride spacer film typically occurs in an industrial scaledevice which has been adapted for such use. Preferably, this device willbe what is known in the art as a batch furnace. However, other apparatuswhich can provide the spacer film having the characteristics hereinafterset forth may also be used. It should be noted that the foregoingdescription illustrates the formation of a spacer film on the gate stackof an access transistor of a memory cell, however, the invention can beused to protect a gate stack of any type of transistor device employedin any type of integrated circuit.

[0023] The process of depositing the spacer film is broadly described asa low temperature and low pressure operation. The operating temperatureof the batch furnace will be within the range of about 350 to about 700°C., more preferably about 450 to about 650° C. More desirably, themethod of the invention will be performed at a temperature of about 500to about 650° C. Operating pressure is typically within the range ofabout 100 to about 1000 milliTorr. In a preferred embodiment, thepressure is within the range of about 250 to about 800 milliTorr.

[0024] To form the silicon oxynitride spacer film, gaseousbistertiarybutylaminosilane (BTBAS) is introduced as part of thedeposition mixture onto the gate stack region. BTBAS provides thesilicon component of the silicon oxynitride spacer film. The BTBAS flowrate will be within the range of about 50 to about 300 SCCM/minute, andmore preferably will be about 100 to about 200 SCCM/minute.

[0025] Along with the BTBAS, other gaseous materials are provided in thedeposition mixture to form the spacer film. One or morenitrogen-containing compounds are provided to react with the BTBAS.These nitrogen-containing compound(s) provide the “nitride” component ofthe silicon oxynitride spacer film. The nitrogen-containing compound(s)may be derived from any industry source, and can include one or more ofthe following compounds: ammonia (NH₃), nitrous oxide (N₂O), nitricoxide (NO) and nitrogen (N₂). Of these, a gaseous mixture containing atleast one of ammonia, nitrous oxide and nitric oxide is preferred, witha mixture containing at least two of these three being more preferred,and a gaseous mixture containing a combination of all three beingparticularly preferred.

[0026] The flow rate for the nitrous oxide will be within the range ofabout 100 to about 1500 SCCM/minute, and more desirably will be withinthe range of about 250 to about 1250 SCCM/minute. The flow rate for thenitric oxide will be within the range of about 25 to about 250SCCM/minute. In a preferred embodiment, the flow rate for the nitricoxide will be about 50 to about 200 SCCM/minute. The flow rate forammonia will be within the range of about 50 to about 1000 SCCM/minute,with about 250 to about 750 SCCM/minute being more preferred.

[0027] Another component of the spacer film is oxygen (O₂). The flowrate for oxygen will be within the range of about 15 to about 100SCCM/minute. More preferably, the oxygen will be introduced at a flowrate of about 30 to about 75 SCCM/minute.

[0028] In a further embodiment of the process of the invention, carbonis incorporated into the resultant spacer film. The carbon is providedfrom the “tertiarybutyl” component of the BTBAS. The carbon becomesbound in the spacer film primarily as silicon carbide (SiC), and to alesser extent as carbon nitride (C₃N₄). It has been now discovered thatas the percentage of carbon in the spacer film is increased, the wetetch rate for the spacer film is decreased significantly. It ispreferred that the carbon incorporation in the spacer film be within therange of about 5 to about 25% by weight, with an amount of about 20% byweight or greater being more desirable (all percentages herein are byweight, unless otherwise specified). Carbon incorporation may bemaximized by increasing the flow rate of the BTBAS within the amountsheretofore set forth. Moreover, by increasing the operating temperatureswithin the ranges already set forth during the spacer film deposition,it is possible to reduce the amount of silicon carbide incorporated.Conversely, lowering the temperature usually results in an increase insilicon carbide incorporation.

[0029] In yet another embodiment of the invention, the ratios of theflow rates of the gases used in depositing the spacer film are adjustedso as to provide a spacer film having a wet etch rate within the rangeof about 25 Angstroms/minute to less than or equal to about 1Angstrom/minute. In particular, the ratio of the flow rate of nitrousoxide to the flow rate of oxygen is adjusted to be within the range ofabout 0.5:1 to about 4:1. It has flow been further discovered that asthe ratio of the flow rates of nitrous oxide to oxygen is increased, thewet etch rate of the resultant spacer film in certain types offluorine-containing wet etchants is decreased. The wet etch rate may betailored from about 25 Angstroms/minute when the N₂O/O₂ ratio is about0.5:1 to less than or equal to about 1 Angstrom/minute when the sameratio is about 4:1 or greater.

[0030] The silicon oxynitride spacer film formed according to theprocess herein described is within the range of about 200 to about 850Angstroms in thickness. More preferably, the spacer film will be withinthe range of about 400 to about 600 Angstroms in thickness.

[0031] Silicon will comprise about 35 to about 45% by weight of thesilicon oxynitride spacer film. More preferably, silicon will compriseabout 37.5% to about 42.5% by weight of the spacer film. Nitrogen willcomprise about 20 to about 30% by weight of the spacer film, with arange of about 22 to about 28% being more preferred. Oxygen will make upabout 10 to about 25% by weight of the spacer film, with amounts in therange of about 15 to about 20% being preferred. As heretofore set forth,carbon will also preferably be included in the spacer film, primarily asbound silicon carbide. The quantity of carbon in the spacer film will bewithin the range of about 5 to about 25% by weight, with an amount inexcess of about 10% being more preferred, and greater than about 20%being even more desirable.

[0032] The silicon oxynitride spacer film will have a relatively highrefractive index within a relatively narrow range of about 1.55 to about1.72. The dielectric constant will be within the range of about 4.5 toabout 5.6. Thus, the spacer film formed according to the process hereindescribed will be highly suitable in most spacer applications. Asheretofore set forth, spacer film deposition conditions can be tailoredto give selective etch rates in certain wet etchants, e.g. HF, fromabout 25 Angstroms/minute to less than about 1 Angstrom/minute. Toobtain similar etch characteristics with a standard oxygen-free siliconnitride film, the dielectric constant would have to be much higher, thuscapacitance coupling would also be higher.

[0033] Referring again to the drawings, FIGS. 2 and 3 illustrate theprocess of the invention as applied to gate stacks of access transistorsused in a memory cell of, for example, a DRAM. In FIG. 2, a spacer film117 has been deposited on the array of gate stacks 116 present on thesubstrate 112 of the semiconductor device 100. In FIG. 3, the excessspacer film material 117 in contact with the substrate 112 has beenremoved according to methods known in the art. The gate stacks 116 areshown with the spacer film 117 thereover. The spacer film 117 willprotect the gate stacks from subsequent SAC etching used to form thecontact openings, as heretofore described. Thereafter, the spacer filmwill be resistant to the wet etchants used to clean the contact openingsor vias of SAC etch residue.

[0034]FIG. 4 shows the semiconductor device 100 at a later stage offabrication in which substrate 112 contains doped active regions 118 andfield oxide regions 114. A layer of insulating material 120, e.g. BPSG,overlays the device through which a contact opening 124 has been etched.The contact opening 124 is provided with a conductive plug 130. Thespacer film 117 of the invention is not etched during formation ofopening 124, and is also not eroded during an etch wash of any residueremaining at the bottom and sides of the etched opening. The spacer film117 also protects the gate stack array 116 from contact with theconductive plug 130. The gate stack array 116 and the spacer film 117shown in FIG. 4 can be part of an access transistor in a memory cell ofa memory device.

[0035] Referring now to FIGS. 4A and 4B, there is shown a close-up ofthe gate stacks 116 presented in FIG. 4 according to two embodiments ofthe invention. In a first embodiment, the novel process and spacer filmherein set forth is provided such that the etch rate of the spacer film117 is very low to provide minimal or no wet etching of the spacer filmas shown in FIG. 4A. In another embodiment shown in FIG. 4B, the wetetch rate of the spacer film 117 is such that wet etchants can etch someportion of the spacer film so as to provide a “pulled back” spacer film117. In this embodiment, a more robust conductive plug 130 contact withthe substrate 112 is often attained. The embodiments shown in FIGS. 4Aand 4B can be alternately attained by adjusting the stoicheometry andother process parameters as heretofore set forth. Thus, it is possibleto obtain a spacer film that is highly resistant to wet etchants, andyet still exhibits a certain selectivity relative thereto.

[0036]FIG. 5 is a graph of the depth profile of a spacer film which hasbeen deposited according to the method of the invention. As showntherein, the stoichiometric quantities of the elements silicon,nitrogen, oxygen and carbon are substantially uniform throughout thedepth, indicating successful deposition of the spacer film.

[0037]FIG. 6 is a graph comparing etch rates in a 100:1 HF solution forseveral spacer films of the invention which were prepared using variousN₂O/O₂ flow rate deposition ratios. As FIG. 6 shows, the etch ratedecreases as the flow rate ratio of nitrous oxide to oxygen isincreased. This indicates that the etch rate of the deposited spacerfilm may be tailored by adjusting the flow rate ratio of nitrous oxideand oxygen during deposition.

[0038] A typical processor based system which includes integratedcircuits that utilize the spacer film formed in accordance with thepresent invention is illustrated generally at 200 in FIG. 7. A processorbased system, such as a computer system, for example, generallycomprises a central processing unit (CPU) 210, for example, amicroprocessor, that communicates with one or more input/output (I/O)devices 240, and a hard drive 250 over a bus system 270 which mayinclude one or more busses and/or bus bridges. The computer system 200also includes a hard disk drive 220, a floppy disk drive 230, a randomaccess memory (RAM) 260, a read only memory (ROM) 280 and, in the caseof a computer system may include other peripheral devices such as acompact disk (CD) ROM drive 230 which also communicate with CPU 210 overthe bus 270. While FIG. 7 shows one exemplary computer systemarchitecture, many others are also possible. One or more of theprocessor and integrated circuits which communicate with the processorsuch as memories 260, 280 may have gate stacks protected with thesilicon oxynitride spacer film described and illustrated above

[0039] The foregoing description is illustrative of exemplaryembodiments which achieve the objects, features and advantages of thepresent invention. It should be apparent that many changes,modifications, substitutions may be made to the described embodimentswithout departing from the spirit or scope of the invention. Theinvention is not to be considered as limited by the foregoingdescription or embodiments, but is only limited by the scope of theappended claims.

[0040] What is claimed as new and desired to be protected by LettersPatent of the U.S. is:

What is claimed is:
 1. A method of depositing a silicon oxynitridespacer film on a gate stack in a semiconductor device, comprising:contacting said gate stack with a gaseous mixture comprisingbistertiarybutylaminosilane (BTBAS), at least one nitrogen-containingcompound, and oxygen (O₂) to form said deposited silicon oxynitridespacer film; and controlling the contact conditions to provide a wetetch rate for said deposited spacer film that is within the range ofabout 25 Angstroms per minute to less than or equal to about 1Angstrom/minute.
 2. The method of claim 1, wherein said contacting isperformed in a batch furnace at a temperature within the range of about350 to about 700° C.
 3. The method of claim. 2, wherein said contactingis performed at a temperature within the range of about 450 to about650° C.
 4. The method of claim 3, wherein said contacting is performedat a temperature within the range of about 500 to about 650° C.
 5. Themethod of claim 2, wherein said contacting is performed at an operatingpressure within the range of about 100 to about 1000 milliTorr.
 6. Themethod of claim 5, wherein said contacting is performed in a batchfurnace at an operating pressure within the range of about 200 to about800 miiliTorr.
 7. The method of claim 1, wherein said contacting isperformed with said BTBAS at a flow rate within the range of about 50 toabout 300 SCCM/minute.
 8. The method of claim 7, wherein said contactingis performed with said BTBAS at a flow rate within the range of about100 to about 200 SCCM/minute.
 9. The method of claim 1, wherein saidcontacting is performed with said oxygen at a flow rate within the rangeof about 15 to about 100 SCCM/minute. 10.The method of claim 9, whereinsaid contacting is performed with said oxygen at a flow rate within therange of about 30 to about 75 SCCM/minute. 11.The method of claim 9,wherein said nitrogen-containing compound is at least one memberselected from the group consisting of ammonia (NH₃), nitrous oxide(N₂O), nitric oxide (NO) and nitrogen (N₂). 12.The method of claim 11,wherein said contacting is performed with said nitrous oxide at a flowrate within the range of about 100 to about 1500 SCCM/minute. 13.Themethod of claim 12, wherein said contacting is performed with saidnitrous oxide at a flow rate within the range of about 250 to about 1250SCCM/minute. 14.The method of claim 11, wherein said contacting isperformed with said nitric oxide at a flow rate within the range ofabout 25 to about 250 SCCM/minute. 15.The method of claim 14, whereinsaid contacting is performed with said nitric oxide at a flow ratewithin the range of about 50 to about 200 SCCM/minute. 16.The method ofclaim 11, wherein said contacting is performed with said ammonia at aflow rate within the range of about 50 to about 1000 SCCM/minute. 17.The method of claim 16, wherein said contacting is performed with saidammonia at a flow rate within the range of about 250 to about 750SCCM/minute. 18.The method of claim 11, wherein said nitrogen-containingcompound is selected from the group consisting of ammonia, nitrous oxideand nitric oxide. 19.The method of claim 18, wherein saidnitrogen-containing compound is at least two members selected from thegroup consisting of ammonia, nitrous oxide and nitric oxide. 20.Themethod of claim 19, wherein said nitrogen-containing compound is acombination of ammonia, nitrous oxide and nitric oxide.
 21. The methodof claim 12, wherein the ratio of said flow rate of said nitrous oxideto said flow rate of said oxygen is within the range of about 0.5: toabout 4:1.
 22. The method of claim 11, wherein carbon is incorporatedinto said spacer film in the form of silicon carbide or carbon nitride.23.The method of claim 17, wherein said deposited spacer film comprisesabout 5 to about 25% carbon. 24.The method of claim 23, wherein saiddeposited spacer film comprises at least about 20% carbon. 25.The methodof claim 1, wherein said nitrogen-containing compound is nitrous oxideand said contacting is performed with said nitrous oxide at a flow ratewithin the range of about 100 to about 1500 SCCM/minute, and with saidoxygen at a flow rate within the range of about 15 to about 100SCCM/minute such that the ratio of said nitrous oxide flow rate to saidoxygen flow rate is within the range of about 0.5:1 to about 4:1. 26.Themethod of claim 25, wherein said contacting is performed with saidnitrous oxide at a flow rate within the range of about 250 to about 1250SCCM/minute, and with said oxygen at a flow rate within the range ofabout 30 to about 75 SCCM/minute.
 27. The method of claim 25, whereinsaid spacer film is deposited to a thickness within the range of about200 to about 850 Angstroms. 28.The method of claim 25, wherein saiddeposited spacer film has a refractive index within the range of about1.55 to about 1.72. 29.The method of claim 25, wherein said depositedspacer film has a dielectric constant within the range of about 4.5 toabout 5.6. 30.A silicon oxynitride spacer film useful for protecting agate stack in a semiconductor device, said spacer film having a wet etchrate in fluorine-containing wet etchant compounds within the range ofabout 25 Angstroms/minute to less than or equal to about 1Angstrom/minute. 31.The spacer film of claim 30, comprising silicon inan amount of about 35 to about 45% by weight, nitrogen in an amount ofabout 20 to about 30% by weight, oxygen in an amount of about 10 toabout 25% by weight and carbon in an amount of about 5 to about 20% byweight. 32.The spacer film of claim 31, comprising silicon in an amountof about 37.5% to about 42.5% by weight, nitrogen in an amount of about22 to about 28% by weight, and oxygen in an amount of about 15 to about20% by weight. 33.The spacer film of claim 32, comprising carbon in anamount of greater than about 10% by weight.
 34. The spacer film of claim33, comprising carbon in an amount of grater than about 20% by weight.35. The spacer film of claim 32, wherein said spacer film is within therange of about 200 to about 850 Angstroms in thickness.
 36. The spacerfilm of claim 35, wherein said spacer film is within the range of about400 to about 600 Angstroms in thickness.
 37. The spacer film of claim30, wherein said spacer film is formed from bistertiarybutylaminosilane(BTBAS), at least one nitrogen-containing compound, oxygen and carbon.38.The spacer film of claim 37, wherein said nitrogen-containingcompound is at least one member selected from the group consisting ofammonia (NH₃), nitrous oxide (N₂O), nitric oxide (NO) and nitrogen (N₂).39.The spacer film of claim 38, wherein said nitrogen-containingcompound is at least one member selected from the group consisting ofammonia, nitrous oxide and nitric oxide. 40.The spacer film of claim 39,wherein said nitrogen-containing compound is at least two membersselected from the group consisting of ammonia, nitrous oxide and nitricoxide. 41.The spacer film of claim 40, wherein said nitrogen-containingcompound is a combination of ammonia, nitrous oxide and nitric oxide.42.The spacer film of claim 41, wherein the flow rate of said nitrousoxide used to form said spacer film is within the range of about 100 toabout 1500 SCCM/minute, and the flow rate of said oxygen is within therange of about 15 to about 100 SCCM/minute such that the ratio of saidnitrous oxide flow rate to said oxygen flow rate is within the range ofabout 0.5:1 to about 4:1 43.The spacer film of claim 42, wherein saidspacer film has a refractive index within the range of about 1.55 toabout 1.72.
 44. The spacer film of claim 43, wherein said spacer filmhas a dielectric constant within the range of about 4.5 to about 5.6.45.A semiconductor device comprising: at least one gate stack; and aspacer film deposited over said gate stack, said spacer film having awet etch rate in fluorine-containing wet etchants within the range ofabout 25 Angstroms/minute to less than or equal to about 1Angstrom/minute. 46.The device of claim 45, comprising silicon in anamount of about 35 to about 45% by weight, nitrogen in an amount ofabout 20 to about 30% by weight, oxygen in an amount of about 10 toabout 25% by weight and carbon in an amount of about 5 to about 20% byweight.
 47. The device of claim 46, comprising silicon in an amount ofabout 37.5% to about 42.5% by weight, nitrogen in an amount of about 22to about 28% by weight, and oxygen in an amount of about 15 to about 20%by weight.
 48. The device of claim 47, comprising carbon in an amount ofgreater than about 10% by weight.
 49. The device of claim 48, comprisingcarbon in an amount of greater than about 20% by weight.
 50. The deviceof claim 49, wherein said spacer film is within the range of about 200to about 850 Angstroms in thickness.
 51. The device of claim 50, whereinsaid spacer film is within the range of about 400 to about 600 Angstromsin thickness.
 52. An integrated circuit comprising: a substrate; atleast one gate stack formed on said substrate; a spacer film depositedon at least the sides of said gate stack, said spacer film having a wetetch rate in fluorine-containing wet etchant compounds within the rangeof about 25 Angstroms/minute to less than or equal to about 1Angstrom/minute. 53.An integrated circuit as in claim 52, wherein saidintegrated circuit is a memory circuit. 54.A memory device comprising amemory cell containing an access transistor, said transistor including agate stack and a spacer film deposited on at least the sides of saidgate stack, said spacer film having a wet etch rate influorine-containing wet etchant compounds within the range of about 25Angstroms/minute to less than or equal to about 1 Angstrom/minute.